| Resume alert | Resumes 91 - 100 of 251 |
Engineer Manager
Santa Clara, CA
... - Northern Illinois University - Naperville Illinois Campus, March 2004 OTHER SKILLS & ACTIVITIES Tool & Die Maker-Plastic Injection Molds: 15years, Solid Works, Minitab, JMP, AutoCAD-Inventor; Society of Plastics Engineers; U.S. Navy Reserves - 2017 Mar 22
... - Northern Illinois University - Naperville Illinois Campus, March 2004 OTHER SKILLS & ACTIVITIES Tool & Die Maker-Plastic Injection Molds: 15years, Solid Works, Minitab, JMP, AutoCAD-Inventor; Society of Plastics Engineers; U.S. Navy Reserves - 2017 Mar 22
Graphic Designer Marketing
Santa Clara, CA
... design adaptability to varied client projects Proficient digital file set up and pre-press Highly skilled in building die lines, mechanicals and print production comps Pulse Media, San Jose, California September 2000 to October 2002 Graphic ... - 2017 Mar 20
... design adaptability to varied client projects Proficient digital file set up and pre-press Highly skilled in building die lines, mechanicals and print production comps Pulse Media, San Jose, California September 2000 to October 2002 Graphic ... - 2017 Mar 20
Engineer Design
San Jose, CA
... and verified low cost AES engine at full chip level SK Hynix Memory solutions (Aug 2013 – Aug 2016) Principal Engineer (LPDDR3/4 Performance simulation & NAND die model & SATA Host subsystem env) Implemented UVM based subsystem verification env. ... - 2017 Mar 16
... and verified low cost AES engine at full chip level SK Hynix Memory solutions (Aug 2013 – Aug 2016) Principal Engineer (LPDDR3/4 Performance simulation & NAND die model & SATA Host subsystem env) Implemented UVM based subsystem verification env. ... - 2017 Mar 16
Engineer Software
Santa Clara, CA
... several LabVIEW Automatic Test applications in order to validate the new chip MP2011 D-Solo DVB-H/T mobile TV demodulator (the world's first single-die all-CMOS device combining DVB-H and Mobile DVB-T capabilities of monolithic CMOS designs). ... - 2017 Mar 03
... several LabVIEW Automatic Test applications in order to validate the new chip MP2011 D-Solo DVB-H/T mobile TV demodulator (the world's first single-die all-CMOS device combining DVB-H and Mobile DVB-T capabilities of monolithic CMOS designs). ... - 2017 Mar 03
Data Management
Fremont, CA
... MDM/Enterprise Data Architect Die Mobiliar, Berne, Switzerland Dec. 2013-July 2014 Installed and configured Oracle UCM 8.1.1.7 along with Oracle EDQ. Designed and implemented custom process to do address validation against Swiss address files ... - 2017 Feb 26
... MDM/Enterprise Data Architect Die Mobiliar, Berne, Switzerland Dec. 2013-July 2014 Installed and configured Oracle UCM 8.1.1.7 along with Oracle EDQ. Designed and implemented custom process to do address validation against Swiss address files ... - 2017 Feb 26
product engineer
San Jose, CA
... Provide product testability for wafer level and packaged-die level test plan development (test steps, power/level/timing conditions, pass/fail criteria), test code and pattern generation(ATPG), DFT requirement, post Si full chip validation and ... - 2017 Feb 26
... Provide product testability for wafer level and packaged-die level test plan development (test steps, power/level/timing conditions, pass/fail criteria), test code and pattern generation(ATPG), DFT requirement, post Si full chip validation and ... - 2017 Feb 26
Data Scientist
Santa Clara, CA
... Build a Linear Regression Model to predict the Sector Failure Rate of a die at a given confidence level. Implemented different models like Logistic Regression, Random Forest and Gradient-Boost Trees to predict whether a given die will pass or fail ... - 2017 Feb 20
... Build a Linear Regression Model to predict the Sector Failure Rate of a die at a given confidence level. Implemented different models like Logistic Regression, Random Forest and Gradient-Boost Trees to predict whether a given die will pass or fail ... - 2017 Feb 20
Engineer Design
San Jose, CA
... Design of 300Mhz clock tree for a die in 0.18um technology (February 2014) Designed a clock tree using H-tree and Minimum Spanning Tree suitable for driving 1.25M flip flops on the chip to keep the rise time and jitter+skew values within 300pS and ... - 2017 Feb 01
... Design of 300Mhz clock tree for a die in 0.18um technology (February 2014) Designed a clock tree using H-tree and Minimum Spanning Tree suitable for driving 1.25M flip flops on the chip to keep the rise time and jitter+skew values within 300pS and ... - 2017 Feb 01
Quality Control Assurance
San Jose, CA
... cable harnesses, chassis, and power supplies Conducted Gold ball bonding and die attach inspections Tool inspection skills: Calipers, Micrometers, metal scales, and gauges (drop, thread, height, and pin) Experienced operating CMM, and Microvu. ... - 2017 Jan 30
... cable harnesses, chassis, and power supplies Conducted Gold ball bonding and die attach inspections Tool inspection skills: Calipers, Micrometers, metal scales, and gauges (drop, thread, height, and pin) Experienced operating CMM, and Microvu. ... - 2017 Jan 30
Data Entry Product Development
San Jose, CA
... Operate various types of equipment (IC die handling, dispenser, ovens, dry boxes, vacuum wands, micrometer, caliper etc.) TEST OPERATOR FLEXTRONIX JUNE 1999- FEBRUARY 2002 Perform machine set ups and determines the sequences operation. Test PC board ... - 2017 Jan 23
... Operate various types of equipment (IC die handling, dispenser, ovens, dry boxes, vacuum wands, micrometer, caliper etc.) TEST OPERATOR FLEXTRONIX JUNE 1999- FEBRUARY 2002 Perform machine set ups and determines the sequences operation. Test PC board ... - 2017 Jan 23