Research Assistant Development Engineer

Jason M. 512-***-**** - Austin, TX

adnjih@r.postjobfree.com http://json.youcanbook.me

Summary

Experienced leader with expertise in High Performance Computing (HPC), SoC architecture and performance, software development, optimization, and automation, with contributions to the Open MPI open source project Experience

Apple Austin, TX

Director of Performance Engineering Jun 2020 - Present

• Home Platforms

Led and grew a senior software engineering team passionate about architecture, scalability, performance, and power in home platforms

Built credibility as a technical leader and established a working relationship/trust with other Directors, Senior Directors, Vice Presidents, multi-functional engineering peers, and engineering teams

Developed the capabilities and leadership skills of the managers and engineers within the team

Responsible for evaluating and improving the performance of current home products and projecting requirements for future products (hardware and software)

Established performance QA and debug teams to methodically capture regressions and bugs, root cause, and propose solutions in tvOS by understanding the low level software-hardware interaction

Collaborated with silicon, hardware, and operating system teams on de ning performance requirements and selecting the appropriate SoC and IPs for each product General Motors Austin, TX

Chief Platform Architect/Director of Engineering Aug 2019 - Jun 2020

• HPC Platform Architecture and Performance

Developed corporate technical direction and HPC roadmap; Provided technical feedback on product development, system-on-chip (SoC), CPU, I/O, memory, and advanced research

Evaluated and reviewed state of the art technology developments within HPC (hardware and software) with speci c attention to the enterprise environment

Mentored engineering team members to improve their analytical skills and deliverables

Partnered with leadership and internal technical teams to analyze compute needs and de ne performance metrics

Interfaced with hardware and software vendors; collaborated on designing new PoCs and evaluated new products and solutions for GM refresh cycles

Advanced Micro Devices (AMD) Austin, TX

Server Performance Architect/Senior Manager Mar 2018 - Jun 2019

• I/O Performance Product Owner (Fabric, Storage, and Accelerators)

De ned features and performance requirements for new products in partnership with directors, product owners, system engineers, program managers, developers, testers, FAEs, and customers

Improved 100GbE bidirectional network throughput on AMD EPYC Naples by 45%

Achieved 100GbE bidirectional throughput line rate on AMD EPYC Rome ( rst ever in the history of AMD); Drove SoC architecture changes on AMD EPYC Rome (10-bit PCIe tags, LCLK setting, Preferred I/O Mode )

Led the I/O performance team; De ned priorities; Estimated required resources; Coached and trained team members; Allocated resources to projects; Conducted technical phone screens and on-site interviews

Directed performance analysis (using software pro lers, hardware performance counters, PCIe analyzer ) for baremetal and virtualization, collaborated with IP architects on product changes

Interfaced with customers, advised on best practices, provided guidance on architecture and performance

Coordinated and conducted debug sessions with di erent device vendors (NIC, NVMe SSD, GPU, FPGA), identi ed opportunities for performance improvement, and ensured their implementation Dell Austin, TX

Senior Sta HPC Systems Development Engineer May 2015 - Mar 2018

• Product Design, De nition, and Development

Identi ed product requirements, technical speci cations, and performance characteristics

Developed custom con gurations for PowerEdge R730XD and R740XD servers with SSD/NVMe devices with up to 200% throughput improvement compared to the original con gurations

Determined product and component feasibility; designed and simulated products and their components; built and evaluated prototypes; validated design

Evaluated and tested new and improved products, components, and software

Conducted PoCs on parallel and distributed le systems, archival solutions, parallel data movers, HSM setups, ScaleIO (40GbE and 100GbE network interconnects, SSD/NVMe storage), Ceph as an archive for Lustre University of Houston Houston, TX

Graduate Research Assistant, Parallel Software Technologies Laboratory Aug 2011 - May 2015

• HPX-RTE: A Lightweight Runtime Environment for Open MPI Language: C, C++ Department of Energy - eXascale Programming Environment and System Software (XPRESS) Project ParalleX is a new parallel execution model aiming to overcome the limitations imposed by the current hardware and the way we write applications today. HPX (High Performance ParalleX) is an experimental runtime system for ParalleX. HPX-RTE is a new runtime system for Open MPI built on HPX to provide support for MPI applications.

Up to 53% faster than Open MPI’s current runtime (ORTE) tested utilizing di erent parallel benchmarks

99.36% smaller code base than ORTE

• Open MPI - OMPIO - PVFS2 and Lustre File System Components Language: C Implemented the capability for reading the stripe size and stripe depth of an existing le in PVFS2 and Lustre le system before opening it. While opening a le:

Using the stripe size and stripe depth values for existing les

Using custom values from the command line (mca parameters), an info object, or a con guration le to tune these parameters based on the hardware con guration and access pattern of the application

• Open MPI - OMPIO - Parallel Log-structured File System (PLFS) Language: C PLFS is a parallel virtual le system that rearranges random, concurrent writes into sequential writes to unique les

(N-1 into N-N). This allows write access patterns to be optimized for the underlying le system. I integrated PLFS into Open MPI OMPIO library. So, MPI applications could bene t from optimizations provided by PLFS. Arisa Web Presence Solutions Tehran, Iran

Director of HPC Jan 2004 - Aug 2011

• Increased YoY revenue of the organization by 40-95% sustained over a ve year period; grew from an individual contributor to leading an organization of 50 employees

• Supervised setup, administration, and maintenance of HPC infrastructure (hardware stack)

• Oversaw installation, porting, and tuning of high performance applications (software stack) Skills

General Skills: Problem Solving, Analytical Reasoning, Strategic Perspective, Results Driven and Quantitative Approach, Attention to Detail, Agile Development, Product Development Technologies: High Performance Computing (HPC), Parallel Programming, Distributed and Shared Memory Systems, Parallel I/O, Parallel and Distributed File Systems, PVFS2, Lustre, BeeGFS, PLFS, ScaleIO, Ceph, SoC Architecture, PCIe, Object Oriented Analysis and Design, MapReduce, HDFS, Pig, Hive, Cluster Management Languages/Libraries: C, C++, Python, MPI, OpenMP, Pthreads, PAPI, MIC, TBB, OpenCL, OpenACC, OpenSHMEM, Cilk Plus, X86 Assembly, Java, C#, Ruby on Rails, ActiveRecord, SQL, UML, HTML, XML Environments/Software: Linux, GNU GCC/G++ Compiler, gdb, ddd, Shell, Slurm, TAU, Valgrind, Emacs, Vi, Git, SVN, LaTeX, AWS Cloud, Hadoop, Ansible, Kubernetes, Containers, Docker, JIRA, Con uence, Ganglia Education

University of Houston Houston, TX

Doctor of Philosophy (PhD) - Computer Science (ABD) 2011-2015 University of Isfahan Isfahan, Iran

Bachelor of Science - Computer Engineering 2001-2008

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