Engineer Process

Jeffrey S. Zola (H) 503-***-****

***** ** ******** ****** (C) 971-***-****

Portland, OR 97229 abnod1@r.postjobfree.com

Employment History

Stimson Lumber Company -Forest Grove, OR

Quality Control Superintendent -Hardboard Operations 2008 - 2009

Manager of Quality Control department. Responsible for ensuring that products conform to customer

expectations and meet ANSI standards in an ultra-lean manufacturing environment.

• Created and deployed Quality Management System. Compiled Quality Control Manual of testing

procedures. Specified testing methods and frequencies. Trained all production personnel to carry out

documented procedures. Analyze and audit results on an ongoing basis to ensure compliance.

• Specify process conditions for boards of several different thicknesses and textures to reduce costs and

maintain board quality at all steps of the production process..

• Configured and maintained Microsoft Access database to streamline data entry for results of board

quality tests. Created reports to analyze and summarize trends.

• Coach and mentor all mill personnel to achieve consistent board quality metrics and grading.

• Created reporting system to analyze board yield loss trends. Used Six Sigma methods to identify root

causes of defects and to implement closed-loop corrective actions.

Jeffrey S. Zola, LLC - Portland, OR

Owner 2008 - 2009

Independent consultant in the patent field.

• Constructed mathematical model to estimate the value of patent assets.

• Drafted patent claims and specifications.

Kolisch Hartwell, PC - Portland, OR

Patent Agent 2005 - 2007

Patent Agent responsible for preparation and prosecution of patent applications before the United States

Patent and Trademark Office.

• Drafted patent claims and specifications for mechanical, electrical, software, and semiconductor

technologies. Specified and oversaw production of drawings.

• Analyzed Office actions from USPTO and foreign patent offices. Prepared amendments to patent

claims. Filed Office action responses with USPTO. Corresponded with foreign agents and clients.

• Assisted patent attorneys with right-to-manufacture studies, patentability studies, and state-of-art

studies.

• Met with clients to discuss new matters.

LSI Logic Corporation- Gresham, OR

Staff Process Engineer 1997 - 2004

Process Control Engineer 2004

Process Engineer responsible for the deployment of various advanced methods of process control.

• Developed model for a process controller which would dynamically determine the process time for

each lot based upon feedback of equipment performance and feed-forward of measurements

performed at a previous step. Developed business logic for the controller.

• Implemented methods for Real Time Fault Detection and Classification.

Jeffrey S. Zola Page 2

LSI Logic Corporation- Gresham, OR (Continued)

In-Line Monitoring (ILM) Process Engineer 2002 - 2004

Process Engineer responsible for inline defect inspection and identification. Department representative for

various Layer Teams. Tool owner for three in-line defect review SEMs.

• Created reporting template for reporting weekly summaries of estimated yield loss. Prepared and

presented to management weekly reports for Layer Team’s area of responsibility.

• Characterized defect mechanisms and drove towards root cause identification and elimination.

• Wrote and updated operations specifications and trained and certified fab personnel on the operation

of the equipment. Implemented automatic SEM review of defects at critical inspection layers.

• Performed Kill Ratio analysis of defects affecting the isolation module of a 0.18 µm process

technology using extensive SEM review of defect inspection results and overlaid Bitmap analysis.

Etch Process Engineer 1997 - 2002

Process Engineer responsible for Oxide Etch steps, as well as the equipment which performed these steps,

in a fab which manufactured ASICs in six different process technologies.

•Developed and implemented roadmap for Oxide Etch processes and equipment. Migrated all Contact

and Via etch processes from five different etch chemistries to two proven chemistries. Developed a

chamber and platform utilization plan to make the best use of capital assets to meet the Fab ramp

schedule. Eliminated two Oxide Etch platforms from a fully ramped fab through increased

availability and reliability. Improved process control to allow Contact and Via etch steps to meet

corporate Cpk targets for electrical and physical measurements. Developed and implemented a robust

universal dechuck routine which reliably and simultaneously eliminated two defect modes.

• Led a cross functional team (CFT) responsible for implementing a system to verify the integrity of

the data in the MES database. Developed a new data template including instruction for use, a

workflow for the team to follow, and a schedule for specification updates. Ensured that over 70

process specifications were validated against requirements for importing into the new database.

• Initiated efforts to modify wafer sampling by an Equipment Interface to allow for proper monitoring

of multi-chamber tools. Developed new requirements to provide for as much flexibility as the

different departments might need. Obtained management approval for CIM resources for

development, testing, and implementation.

Mattson Technology - Austin, TX

Field Process Engineer 1997

Field Engineer responsible for startup and sustaining of equipment. Interface between product groups

at the company headquarters in Fremont, CA and customers around the world.

Advanced Micro Devices - Fab25, Austin, TX

Manufacturing Engineer 1995 - 1997

Compressed work shift’s principal sustaining engineer in a microprocessor production fab. Technical

leader for natural work group’s continuous improvement projects.

Jeffrey S. Zola Page 3

IBM Corporation - Advanced Semiconductor Technology Center, East Fishkill, NY

Etch Process Engineer 1992 - 1995

Development and sustaining engineer in a 0.25 µm pilot fab for 64Mb and 256Mb DRAM, several

families of CMOS logic, and a SiGe BiCMOS technology. Integral member of dielectric and silicon

etch process teams

Microelectronics Academic Program 1991 - 1992

Full-time graduate student at Cornell University. Researched the use of Near Field Photolithography to

define sub-wavelength features in a thin layer of conventional photoresist using a tri-layer resist system.

Education

Cornell University, Ithaca, NY

Master of Engineering - Engineering Physics 1992

Bachelor of Science (with distinction) - Applied and Engineering Physics 1991

Publications/Patents/Community Involvement

• “A Successful Ramp of Exelan Chambers into Full Scale Production”

Lam Research Corporation Technical Symposium Series June, 2001

• US Patent #6,376,795 (Direct current dechucking system) Issued April 23, 2002

• Grand Awards Judge, Engineering (Intel International Science and Engineering Fair) May,

2004

• United States Patent & Trademark Office, Registered Patent Agent #56,715 March, 2005

• “Oxide etch rate estimation using plasma impedance monitoring”

Proc. SPIE Vol. 5755, p. 59-68 May, 2005

• “Wafer sampling by regression for systematic wafer variation detection”

Proc. SPIE Vol. 5755, p. 212-221 May, 2005

• Tau Beta Pi Engineering Honor Society Lifetime Member

• Cornell Society of Engineers Member

• Cornell Club of Oregon and SW Washington Member

• National Association of Patent Practitioners Member

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