Electrical Engineer Assistant

AZIZA RAHMAN

(E-mail: abh5bt@r.postjobfree.com)

U.S.CITIZEN

Address: ** ****** ****** **-***** Phone: 678-***-****

Objective Seeking a full-time or contract position in Engineering-

concentration in product development, PCB design,VLSI/Integrated

circuit design, microelectronics, chip fabrication, package design

and related areas.

Work Broadcom Corporation, Irvine CA

Experience IC Package design Engineer : Emphasis on back-end engineering

- Create IC package assembly instructions

Feb.'07-Aug Received 4 day professional training on Allegro Package Designer

10 15.7 version

- Design / Verify / Compare IC package layouts/ drawings using APD

,UPD, AutoCAD

- Failure analysis

- IC package and Board reliability testing ( example- drop test )

- Package qualification ( example : halogen-free substrate

qualification)

Managed product life-cycle for 30 plus devices : starting from AI

creation and APCN, Build request, Functional test/ System test

management with team members and finally qualifying the device for

Jun.'06-Jan.' production

07

3D Systems Inc, Rock Hill SC

Junior Electrical Engineer

Created schematics and PCB layouts using Altium Designer 6.5 for the

following designs

UV light sensor, Adapter board, USB board

Received 2 weeks special training on Altium PCB layout from Efficient

Aug.-Dec. '05 Computer System,

LLC, Center Barnstead NH

Packaging Research Center (PRC), Georgia Institute of Technology,

Atlanta, GA

Research Assistant

Aug.'04-May'0 Assisted Dr. Swaminathan, Professor of Electronic Packaging, in

5 creating circuit schematics

and transient responses using Microcap tool for an upcoming book

School of Electrical and Computer Engineering, Georgia Institute of

Technology, Atlanta, GA

Research Assistant

Jan.-May'04 Created SKILL program to automate wire length extraction

Prepared SKILL tutorial for Advanced VLSI Systems Course

Received Georgia Tech President's Undergraduate Research Award

Spring 2005

Jan.-Aug'03 Research Assistant

Synthesized Verilog code for C499 circuit using Synopsis

Routed synthesized design using Silicon Ensemble

Received Georgia Tech President's Undergraduate Research Award

Fall 2004

Research Assistant

Created a user interactive RLC circuit demo using Matlab GUI

Presented the RLC GUI in the introduction to circuit analysis course

Education Georgia Institute of Technology, Atlanta GA

Dec.'05 Bachelor of Science in Computer Engineering

Special Topic Course

Compared transfer and self impedances between solid and EBG planes in

an ADC board

Senior Design Course

Built a single chip RF PLL synthesizer that generated 1500-1800 MHz

output frequency

Electronic Packaging Course

Designed MCM using H-Tree clock architecture

Designed LNA for W-CDMA technology

CMOS Fabrication Course

Fabricated CMOS wafer using photolithography, diffusion, oxidation,

metallization

Verified DC and I/O characteristics of NMOS-PMOS and inverter

respectively

Education Integrated Circuit Design: Logical effort, DRC, LVS verification,

al Layout synthesis, Routing

Experienc CMOS Fabrication Process: Oxidation, Diffusion, Photolithography,

e Masking, Pan-etch

Electronics: Oscilloscopes, Function generators, Digital

multimeters

Operating Systems and Computer Languages: UNIX, Windows NT

4.0,2000/Professional, SunOS, SKILL, Scheme, elementary VHDL and

Verilog

Software: Altium Designer 6.5, Microcap, MathCAD, PSpice, Matlab,

Labview, Altera MAX+plus II, Cadence Virtuoso, Allegro Package

Designer, UPD, Synopsis, Silicon Ensemble, Express PCB,

TMM,AutoCAD

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