Post Job Free
Sign in

Electrical Engineer Design

Location:
Seattle, WA, 98115
Posted:
November 18, 2010

Contact this candidate

Resume:

Mark Rutzer

**** *** *** **

Seattle, WA. *****

Phone: 425-***-****

Email: abh31b@r.postjobfree.com

Professional Objective:

To obtain a challenging position in Electrical Engineering that will enable

continued growth of technical, business, and leadership skills.

Educational Background:

Scholastic:

Master of Science in Electrical Engineering: June 2002

University of Washington, Seattle, WA.

GPA: 3.79/4.00

Bachelor of Science in Electrical Engineering: Dec. 1997

Washington State University, Pullman, WA.

GPA: 3.69/4.00

Industry:

ESD Device/Design Seminar: May 23-25, 2005,

Electrostatic Discharge Association, Rome, NY.

Advanced Verilog Workshop: June 3-5, 2003,

Synopsis Customer Education Services, Mountain View, CA.

Advanced Analog CMOS IC Design Training: April 24-28, 2000,

MEAD Microelectronics Inc., Monterey, CA.

Patents:

Co-inventor of Systems and Methods for Sensing External Magnetic

Fields in Implantable

Medical Devices patent

Co-inventor of On-demand retransmission of data with an implantable

medical device

Work Experience:

SENIOR ELECTRICAL ENGINEER CONTRACTOR (Nov. 2008-Present) Physio-Control,

Redmond, WA.

Responsible for electrical engineering activities for external

defibrillator products:

. Designed a HV (2000 V) flyback converter circuit; Responsible for

requirements development, debugging prototype design, and writing /

executing DVT plans/protocols

. Participated in various hardware design change planning, scheduling, and

implementation activities

. Responsible for component selection, RoHS risk analysis, PCBA

schematic/layout updates, and analog simulation

. Supported field and production line issues involving engineering analysis

and laboratory testing

. Interfaced directly with contract manufacturers and suppliers to support

design change activities and field issues

. Drafted EMC testing protocol and report for external defibrillator

product and oversaw testing activity

. Extensive knowledge of eCentral PLM system

SENIOR ELECTRICAL ENGINEER (ANALOG) (Mar. 2007-Sept. 2008) Northstar

Neuroscience, Seattle, WA.

Responsible for system level architecture, analog IC architecture and

analog board level design of implantable neurostimulator products:

. Designed architecture for mixed-signal ASIC and PCBA for use in an

implantable neurostimulation device

. Led supplier selection efforts for both mixed-signal ASIC and electronics

manufacturing (assembly)

. Served as lead electrical engineer on several neurostimulator device inch-

up projects; Responsible for system requirements as well as creating DVT

plans, protocols, and reports

. Performed system engineering/architect activities which included

designing a service life estimator for an implantable battery operated

neurostimulator device; Design required partitioning architecture across

multiple system and subsystem level components

. Involved with design feasibility activities for inductive power transfer

into an implanted neurostimulator device

. Performed analog board level design of a high voltage therapy delivery

system for an implantable neurostimulator device

. Drafted EMC testing protocol and report for implantable neurostimulator

product and oversaw testing activity

SENIOR ELECTRICAL ENGINEER (ANALOG) (Jan. 1999-Mar. 2007) Guidant

Corporation/Boston Scientific, Redmond, WA.

Responsible for Analog IC design, testing, and system DVT for implantable

heart pacemaker/defibrillator products.

. Analog IC design experience with Multistage Switched Capacitor Filters,

Sigma Delta ADC, and DC/DC Converter

. Performed mixed signal simulations on complex IC circuits

. Performed electrical design analysis testing for implantable

pacemaker/defibrillator prototype products which involved frequent use of

laboratory testing equipment (oscilloscopes, waveform generators, signal

analyzers)

. Performed light digital design activities in Verilog

ANALOG IC DESIGN ENGINEER (Jan. 1998 - Dec. 1998) InControl Inc., Redmond,

WA

Responsible for analog IC design and layout for an implantable heart

pacemaker/defibrillator product

Tool Experience:

. Cadence (IC Level) - Composer (Schematic Capture), Spectre (Analog

Simulator), SpectreVerilog (Mixed Signal Simulator), NCSIM (Digital

HDL Simulator)

. Cadence Concept HDL

. Cadence Allegro (for layout viewing)

. PSPICE

. Verilog HDL

. Unix

. MATHCAD

. SWITCAP

. MATLAB/SIMULINK



Contact this candidate