| Job alert | Jobs 101 - 110 of 1312 |
RTL Integration (Frontend) Engineer (multiple )
Edgecortix Inc.
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India
RTL Integration (Frontend) Engineer (multiple positions) About EdgeCortix At Edgecortix we are a deep-tech startup revolutionizing edge computing with artificial intelligence and novel high efficiency silicon on chip design. Originating from ... - Jun 27
DDR Applications Engineer
Uniquify
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San Jose, CA
Core Responsibilities: As a DDR Applications Engineer you will be involved with customer interfacing on all phases of phy and controller design of high performance ddr interface from RFQ, RTL to delivery of our final GDSII. Your responsibilities ... - Jun 08
Senior ASIC Physical Design Engineer
Prodapt ASIC services (Formerly Innovative Logic)
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Austin, TX, 78716
Prodapt is looking for a Senior Physical Design Engineer who has extensive experience in the RTL2GDSII flows for complex SoCs using the latest Synopsys/Cadence tools and nodes such as 5/3nm. 1+ year Contract Location: Austin, TX Responsibilities... - Jun 18
Act Mgr Rtl SMB-Business Sls
Verizon
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Westminster, CO, 80031
When you join Verizon Verizon is one of the world’s leading providers of technology and communications services, transforming the way we connect around the world. We’re a human network that reaches across the globe and works behind the scenes. We... - Jun 25
Digital Design Engineer
PRI Global
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Washington, CA, 95986
Please share resume on Only USC/GC W2 Title: Silicon Digital Design Engineer III Location: REMOTE Duration: 12 Months Contract Must Have: • 4+ years of experience as a Digital Design Engineer and/or a Chip Lead • Experience in RTL coding, synthesis ... - Jun 24
Senior ASIC Physical Design Engineer
Prodapt ASIC services (Formerly Innovative Logic)
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Sunnyvale, CA, 94087
Prodapt is looking for a Senior Physical Design Engineer who has extensive experience in the RTL2GDSII flows for complex SoCs using the latest Synopsys/Cadence tools and nodes such as 5/3nm. 1+ year Contract Location: Sunnyvale, CA Responsibilities... - Jun 18
Senior FPGA Design Engineer
USA Tech Recruitment
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San Jose, CA
... Lead architecture definition, RTL programming, synthesis, and timing closure for high-speed Xilinx FPGA. Collaborate with teams for lab bring-up, integration, and test validation. Qualifications 7+ years of FPGA prototyping experience. Proficient in ... - Jun 18
ASIC RTL Design Engineer
Tessolve
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Bengaluru, Karnataka, India
ASIC/RTL Design Engineer **Location:** United Kingdom ( 8 years to 20 years) **Location:** Bangalore ( 3 years to 9 years) **Role Overview:** We are looking for an experienced ASIC/RTL Design Engineer with 3 to 20 years of experience to join our ... - Jun 22
Hardware Engineering Failure Analysis (Onsite)
SEDAA
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San Jose, CA
... basic trouble shooting concert RCAD some familiarity w/board We are not looking for expertise in ASIC - components (FPGA components from board design point of view, not RTL or coding. that's not required. Does not need to have networking background. - Jun 25
Design Verification Engineer
LanceSoft, Inc.
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San Diego, CA
... Strong troubleshooting skills across embedded systems disciplines (PMIC, Analog behavioral models, digital RTL, Firmware) 3. Expert-level System Verilog Programming 4. Advanced UVM/SV(Universal Verification Methodology using System Verilog) 5. ... - Jun 02